NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858
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© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.4 — 14 May 2018
314514
213 of 345
Name
Access
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
value
msr
R
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
INTAUX
BGT
PRES
XXXX
X000
usr1
R
RESERV
ED
RESERV
ED
MUTE
EARLY
pe
ovr
fer
ft
XX00
0000
usr2
R
to3
to2
to1
wrdaccerr INTAUXL PROTL
PRESL
PTL
0000
0000
[2] Configuration registers doubled (one by slot) and sharing the same address, selection is done with bit
IOauxen in register ssr.
[3] 32-bit FIFO access registers are shown here 8-bit for representation convenience.
[4] disATRcounter bit is only available for slot 1 since ATR counter is dedicated to slot 1.
[5] CST bit is only available for slot 1, this feature is ensured by CLKAUXen bit in ssr register for the auxiliary
slot.
Another view of the registers can be obtained by looking to the functions they controlled.
We can form 4 groups: general, ISO UART, slot 1 and slot AUX (2).
The general register allows to perform a software reset of the Contact Interface, to select
the slot used, to configure the time-out counters (used to process real-time tasks like
WWT, CWT).
The ISO UART registers allows to control data reception and transmission through
configuration and status registers.
Slot 1 and AUXiliary (2) have dedicated registers to control card power (only slot 1), card
ATR (only slot 1), I/O and CLK pins slew rate (only slot 1), data baud rate, protocol and
card clock configuration. Since each slot has its own registers and since these slot
registers share the same addresses (grey rectangles on the following picture), the slot
inherent registers are addressed when the slot is selected using general register.
This is depicted by the following picture:
