NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858
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User manual
COMPANY PUBLIC
Rev. 1.4 — 14 May 2018
314514
294 of 345
HOSTIF_I2C_CONTROL_REG
This register is used is to control the I²C host interface.
Table 326. HOSTIF_I2C_CONTROL_REG (address offset 0x000C)
Bit
Symbol
Access Reset
Value
Description
31:8
RESERVED
R
0
Reserved
7:5
I2C_REV_ID
R/W
0
Die Revision of Device ID
4
I2C_DEVID_ENABLE
R/W
0
1 - Enable Device ID defined in the I2C
standard
3
I2C_RESET_ENABLE R/W
0
1 - Enable Soft Reset sequence defined in
the I2C standard
2
I2C_HS_ENABLE
R/W
0
1 - Enable High-speed mode
1:0
I2C_ADDR
R/W
0
Set two LSBs of the I2C address
HOSTIF_SPI_CONTROL_REG
This register is used to control the SPI host interface.
Table 327. HOSTIF_SPI_CONTROL_REG (address offset 0x0010)
Bit
Symbol
Access Reset
Value
Description
31:2
RESERVED
R
0
Reserved
1
SPI_CPHA
R/W
0
SPI clock phase
0
SPI_CPOL
R/W
0
SPI clock polarity
HOSTIF_HSU_CONTROL_REG
This register is used to control the High-speed UART host interface
Table 328. HOSTIF_HSU_CONTROL_REG (address offset 0x0014)
Bit
Symbol
Access Reset
Value
Description
31:28
RESERVED
R
0
Reserved
27:21
HSU_EOF_SIZE
R/W
0x10
EOF duration in bit number - 1 (1-122)
20
HSU_STORE_BR_BY
TE
R/W
0
1: the first 0 used to estimate baud rate is
stored in memory
19:18
HSU_BR_ESTIMATOR
_MODE
R/W
0
00: Baud rate estimator inactive
01: Baud rate estimator active with
automatic clock setting
10: Baud rate estimator active without
clock setting
11: Reserved
17:16
HSU_WAKEUP_BYTE
S
R/W
1
Number of bytes lost during wakeup at
RTS rising edge
