NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858
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© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.4 — 14 May 2018
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327 of 345
15.4.2.3 USB EP command/ Status list start address
This 32-bit register indicates the start address of the USB EP command/ status list. Only
a subset of these bits is programmable by software. The 8 least-significant bits are
hardcoded to zero because the list must start on a 256 byte boundary. Bits 31 to 8 can
be programmed by software.
Table 358. USB EP command/status list address (address offset = 0x08)
Reset value: see configuration values
Bit
Symbol
Description
Reset
value
Access
7:0
RESERVED Reserved
RO
31:8
EP_LIST
These are the programmable bits for firmware to indicate the start
address of the USB EP Command/Status List.
R/W
15.4.2.4 USB data buffer start address
This 32-bit register indicates the page of the AHB address where the endpoint data can
be located
Table 359. USB data buffer start address (address offset = 0x0C)
Reset value: see configuration values
Bit
Symbol
Description
Reset
Value
Access
21:0
RESERVED
Reserved
RO
31:22 DA_BUF
These are the programmable bits for firmware to indicate the buffer
pointer page where all endpoint data buffers are located.
R/W
15.4.2.5 Link Power Management register
Table 360. Link Power Management register (address offset = 0x10)
Reset value: 0x00000000
Bit
Symbol
Description
Reset
Value
Access
3:0
HIRD_HW
Host initiated resume duration - hardware
This is the HIRD value from the last received LPM token
0
RO
7:4
HIRD_SW
Host initiated resume duration - software
This is the time duration required by the USB device system to
come out of LPM initiated suspend after receiving the host initiated
LPM resume.
0
R/W
8
Data Pending
As long as this bit is set to one and LPM supported bit is set to one,
hardware will return a NYET handshake on every LPM token it
receives. If LPM supported bit is set to one and this bit is zero,
hardware will return an ACK handshake on every LPM token it
receives. If SW has still data pending and LPM is supported, it must
set this bit to „1‟.
0
R/W
31:9
RESERVED
Reserved
0
RO
