NXP Semiconductors PN7360AUEV, User Manual

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NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC Rev. 1.4 — 14 May 2018
314514
85 of 345
Bit Symbol Access Value Description
1: Enable PVDD_M IRQ
0: Disable PVDD_M IRQ
5
PVDD_IRQ_VAL rw 0x00
Selects the PVDD voltage trigger level
0: PVDD voltage trigger level 1.8 V
1: PVDD voltage trigger level 3.3 V
4
PVDD_IRQ_EN rw 0x00
Enables the PVDD IRQ
1: Enable PVDD IRQ
0: Disable PVDD IRQ
3
HOSTIF_SW_REGCONTR
OL_EN
rw 0x00 1: Enabled control of USB D+,D- from ATX_A/B registers
2:0
HIF_SELECTION rw 0x00
host interface selection
000: No Host interface selected
001: I2C selected as host interface
010: SPI selected as host interface
011: HSU selected as host interface
100 -USB selected as host interface
others - Invalid
Table 76. PCR_PMU_REG (address offset 0x10)
Bit Symbol Access Value Description
31:29
PBF_CONST_LOAD_VA
L
rw 0x00 configuration bits for constant load on vdhf
28
PBF_EN_CONST_LOAD rw 0x00
Power down signal to connect/disconnect a constant
load to vdhf
27
VBATMON_OVERRIDE_VA
L
rw 0x00
VBUS monitor override value
0: for 2.7 V
1: for 2.3 V
26
VBATMON_OVERRIDE_EN rw 0x00
VBUS monitor override enable
1: Enable for VBUS monitor
0: Disable VBUS monitor
25 PD_PBF_FIELDSENS rw 0x01 1- Enable for pbf_pd_fieldsens
24 BG_TRIM_A rw 0x00 bandgap trim bit
23 BG_TRIM_B rw 0x00 bandgap trim bit
22 BG_TRIM_C rw 0x00 bandgap trim bit
21 BG_TRIM_D rw 0x00 bandgap trim bit
17:20 RESERVED rw 0x00 Reserved
16 MLDO_LOWPOWER_BG_
EN
rw 0x01 Controls mldo bandgap low power signals.
15 MLDO_LOWPOWER_VAL rw 0x00 Value of mldo_low power signal
14 MLDO_LOWPOWER_EN rw 0x00 Controls mldo low power signals