LSI LSI53C1000, Technical Manual

Page: 138 / 384

4-28 Registers
CON Connected 4
This bit is automatically set any time the LSI53C1000 is
connected to the SCSI bus as an initiator or as a target.
It is set after the LSI53C1000 successfully completes
arbitration or when it has responded to a bus-initiated
selection or reselection. This bit is also set after the chip
wins simple arbitration when operating in low level mode.
When this bit is cleared, the LSI53C1000 is not
connected to the SCSI bus.
The CPU can force a connected or disconnected
condition by setting or clearing this bit.
RST Assert SCSI RST/ Signal 3
Setting this bit asserts the SRST/ signal. The SRST/
output remains asserted until this bit is cleared. The
25
µ
s minimum assertion time defined in the SCSI
specification must be timed out by the controlling
microprocessor or a SCRIPTS loop.
AESP Assert Even SCSI Parity (force bad parity) 2
When this bit is set, the LSI53C1000 asserts even parity.
It forces a SCSI parity error on each byte sent to the
SCSI bus from the chip. If parity checking is enabled,
then the LSI53C1000 checks data received for odd parity.
This bit is used for diagnostic testing and is cleared for
normal operation.
IARB Immediate Arbitration 1
Setting this bit causes the SCSI core to immediately
begin arbitration once a Bus Free phase is detected
following an expected SCSI disconnect. This bit is useful
for multithreaded applications. The ARB[1:0] bits in
SCSI
Control Zero (SCNTL0) are set for full arbitration and
selection before setting this bit.
Arbitration is retried until won. At that point, the
LSI53C1000 holds SBSY and SSEL asserted, and waits
for a select or reselect sequence. The Immediate
Arbitration bit is cleared automatically when the selection
or reselection sequence is completed or times out.