LSI LSI53C1000, Technical Manual

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3-14 Signal Descriptions
3.6 Flash ROM and Memory Interface Signals
Table 3.12 describes the Flash ROM and Memory Interface Signal
groups.
Table 3.12 Flash ROM and Memory Interface Signals
Name Bump Type Strength Description
MWE/ AC19 O 4 mA Memory Write Enable. This pin is a write enable
signal to an external flash memory.
MCE/ AA18 O 4 mA Memory Chip Enable. This pin is a chip enable
signal to an external EPROM or flash memory
device.
MOE/_
TESTOUT Y18 O 4 mA Memory Output Enable. This pin is an output
enable signal to an external EPROM or flash
memory during read operations. It is also used to
test the connectivity of the LSI53C1000 signals in
the “AND-tree” test mode.
MAS0/ AC18 O 4 mA Memory Address Strobe 0. This pin latches in the
least significant address byte (bits [7:0]) of an
external EPROM or flash memory. Since the
LSI53C1000 moves addresses eight bits at a time,
this pin connects to the clock of an external bank of
flip-flops that assemble up to a 20-bit address for
the external memory.
MAS1/ AA17 O 4 mA Memory Address Strobe 1. This pin latches in the
most significant address byte (bits [15:8]) of an
external EPROM or flash memory. Since the
LSI53C1000 moves addresses eight bits at a time,
this pin connects to the clock of an external bank of
flip-flops that assemble up to a 20-bit address for
the external memory.
MAD[7:0] Y19, AA19,
AC20, AB20,
AA20, AC22,
AB21, AC23 I/O 4 mA Memory Address/Data Bus. This bus, in
conjunction with the memory address strobe pins
and external address latches, assembles up to a
20-bit address for an external EPROM or flash
memory. This bus first issues the least significant
byte and finishes with the most significant bits. It is
also used to write data to a flash memory or read
data into the chip from external EPROM/flash
memory. These pins have static pull-downs.