LSI LSI53C1000, Technical Manual

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SCSI Functional Description 2-19
2.2.1 SCRIPTS Processor
The SCSI SCRIPTS processor allows fetches of both DMA and SCSI
commands from host memory or internal SCRIPTS RAM. Algorithms
written in SCSI SCRIPTS control the actions of the SCSI and DMA
cores. The SCRIPTS processor, running off of the PCI clock, executes
complex SCSI bus sequences independently of the host CPU.
Algorithms can be designed to tune SCSI bus performance to adjust to
new bus device types, such as scanners, communication gateways, etc.
They can also incorporate changes in the SCSI logical bus definitions
without sacrificing I/O performance. SCSI SCRIPTS are hardware
independent, so they can be used interchangeably on any host or CPU
system bus. SCSI SCRIPTS handle conditions such as Phase Mismatch.
2.2.1.1 Phase Mismatch Handling in SCRIPTS
The LSI53C1000 can handle phase mismatches due to drive disconnects
without needing to interrupt the processor. The primary goal of this logic
is to completely eliminate the need for CPU intervention during an I/O
disconnect/reselect sequence.
SCRIPTS control the storage of appropriate information needed to
restart the I/O state, eliminating the need for processor intervention
during an I/O disconnect/reselect sequence. Calculations are performed
such that the appropriate information is available to SCRIPTS so that an
I/O state can be properly stored for restart later.
The Phase Mismatch Jump logic is disabled at power-up. To enable the
phase mismatch jump logic, set the Phase Mismatch Jump Enable bit
(ENPMJ, bit 7 in the
Chip Control Zero (CCNTL0) register). Utilizing the
information supplied in the Phase Mismatch Jump Address registers
allows all overhead involved in a disconnect/reselect sequence to be
handled with a modest amount of SCRIPTS instructions. These registers
are described in detail in
Chapter 4, “Registers.”
2.2.2 Internal SCRIPTS RAM
The LSI53C1000 has 8 Kbytes (2048 x 32 bits) of internal, general
purpose RAM. The RAM is designed for SCRIPTS program storage, but
is not limited to this type of information. When the chip fetches SCRIPTS
instructions or Table Indirect information from the internal RAM, these