SCSI Registers
4-75
Register: 0x43
SCSI Interrupt Status One (SIST1)
Read Only
Reading the SIST1 register returns the status of the various interrupt
conditions, whether they are enabled in the
register or not. Each bit set indicates an occurrence of the
corresponding condition. Reading the SIST1 clears the interrupt
condition.
R
Reserved
[7:5]
SBMC
SCSI Bus Mode Change
4
This bit is set when the DIFFSENS pin detects a change
in voltage level indicating the SCSI bus has switched
between SE, LVD, or HVD modes. HVD is not supported.
R
Reserved
3
STO
Selection or Reselection Time-Out
2
This bit is set when the SCSI device which the
LSI53C1000 is attempting to select or reselect does not
respond within the programmed time-out period. See the
description of the
register,
bits [3:0], for more information on the time-out timer.
GEN
General Purpose Timer Expired
1
This bit is set when the general purpose timer expires.
The time measured is the time between enabling and
disabling of the timer. See the description of the
register, bits [3:0], for more
information on the general purpose timer.
HTH
Handshake-to-Handshake Timer Expired
0
This bit is set when the handshake-to-handshake timer
expires. The time measured is the SCSI Request-to-
Request (target) or Acknowledge-to-Acknowledge
(initiator) period. See the description of the
register, bits [7:4], for more information on
the handshake-to-handshake timer.
7
5
4
3
2
1
0
R
SBMC
R
STO
GEN
HTH
0
0
0
0
0
0
0
0
Summary of Contents for LSI53C1000
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 28: ...1 12 Introduction...
Page 234: ...4 124 Registers...
Page 314: ...6 40 Specifications This page intentionally left blank...
Page 318: ...6 44 Specifications This page intentionally left blank...
Page 344: ...6 70 Specifications This page intentionally left blank...
Page 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Page 352: ...6 78 Specifications...
Page 360: ...A 8 Register Summary...
Page 376: ...IX 12 Index...