6-46
Specifications
Figure 6.26 External Memory Write
CLK
(Driven by System)
PAR
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C1000)
STOP/
(Driven by LSI53C1000)
DEVSEL/
(Driven by LSI53C1000)
AD[31:0]
C_BE[3:0]/
(Driven by Master)
FRAME/
(Driven by Master)
1
2
3
4
5
6
7
8
9
10
Addr
In
MAD
(Driven by LSI53C1000)
High Order
Address
Middle Order
Address
Low Order
Address
MAS1/
(Driven by LSI53C1000)
MAS0/
(Driven by LSI53C1000)
MCE/
(Driven by LSI53C1000)
MOE/
(Driven by LSI53C1000)
MWE/
(Driven by LSI53C1000)
t
1
t
2
t
1
t
2
CMD
In
t
1
t
2
t
1
t
2
t
1
t
13
t
11
t
12
Data In
t
2
t
1
Byte Enable
t
2
In
t
1
t
2
t
2
t
3
t
3
t
3
(Driven by Master)
(Driven by Master)
t
23
Summary of Contents for LSI53C1000
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 28: ...1 12 Introduction...
Page 234: ...4 124 Registers...
Page 314: ...6 40 Specifications This page intentionally left blank...
Page 318: ...6 44 Specifications This page intentionally left blank...
Page 344: ...6 70 Specifications This page intentionally left blank...
Page 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Page 352: ...6 78 Specifications...
Page 360: ...A 8 Register Summary...
Page 376: ...IX 12 Index...