SCSI Timing Diagrams
6-63
Figure 6.36 Initiator Asynchronous Receive
Figure 6.37 Target Asynchronous Send
Table 6.40
Initiator Asynchronous Receive
Symbol
Parameter
Min
Max
Units
t
1
SACK/ asserted from SREQ/ asserted
5
–
ns
t
2
SACK/ deasserted from SREQ/ deasserted
5
–
ns
t
3
Data setup to SREQ/ asserted
0
–
ns
t
4
Data hold from SACK/ asserted
0
–
ns
Valid n
Valid n + 1
n + 1
n + 1
n
n
t
1
t
2
t
3
t
4
SREQ/
SACK/
SD[15:0]/,
SDP[1:0]/
Table 6.41
Target Asynchronous Send
Symbol
Parameter
Min
Max
Units
t
1
SREQ/ deasserted from SACK/ asserted
5
–
ns
t
2
SREQ/ asserted from SACK/ deasserted
5
–
ns
t
3
Data setup to SREQ/ asserted
55
–
ns
t
4
Data hold from SACK/ asserted
0
–
ns
Valid n
Valid n + 1
n + 1
n + 1
n
n
t
1
t
2
t
3
t
4
SREQ/
SACK/
SD[15:0]/,
SDP[1:0]/
Summary of Contents for LSI53C1000
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 28: ...1 12 Introduction...
Page 234: ...4 124 Registers...
Page 314: ...6 40 Specifications This page intentionally left blank...
Page 318: ...6 44 Specifications This page intentionally left blank...
Page 344: ...6 70 Specifications This page intentionally left blank...
Page 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Page 352: ...6 78 Specifications...
Page 360: ...A 8 Register Summary...
Page 376: ...IX 12 Index...