LSI LSI53C1000, Technical Manual

Page: 216 / 384

4-106 Registers
40 1 4 25.00 20.00 10.00
40 1.5 0 37.50 13.33 13.33
40 1.5 1 37.50 13.33 10.67
40 1.5 2 37.50 13.33 8.89
40 1.5 3 37.50 13.33 7.62
40 1.5 4 37.50 13.33 6.67
40 2 0 50.00 10.00 10.00
40 2 1 50.00 10.00 8.00
40 2 2 50.00 10.00 6.67
40 2 3 50.00 10.00 5.71
40 2 4 50.00 10.00 5.00
40 3 0 75.00 6.67 6.67
40 3 1 75.00 6.67 5.33
40 3 2 75.00 6.67 4.44
40 3 3 75.00 6.67 3.81
40 3 4 75.00 6.67 3.33
40 4 0 100.00 5.00 5.00
40 4 1 100.00 5.00 4.00
40 4 2 100.00 5.00 3.33
40 4 3 100.00 5.00 2.86
40 4 4 100.00 5.00 2.50
40 8 0 200.00 2.50 2.50
40 8 1 200.00 2.50 2.00
40 8 2 200.00 2.50 1.67
40 8 3 200.00 2.50 1.43
40 8 4 200.00 2.50 1.25
1. Number Xclks = XC XC XC XCLKH_ST
Table 4.5 Single Transition Transfer Rates
Clock
(MHz) Diviso
r
Number
Xclks
1
Base Period
(ns)
Receive Rate
(Megatransfers/s)
Send Rate
(Megatransfers/s)
160 1 0 6.25 40.00 40.00
160 1 1 6.25 40.00 32.00
160 1 2 6.25 40.00 26.67
160 1.5 0 9.38 26.67 26.67
160 1.5 1 9.38 26.67 21.33
160 1.5 2 9.38 26.67 17.78
160 2 0 12.50 20.00 20.00
Table 4.4 DT Transfer Rates (Cont.)
Clock
(MHz) Diviso
r
Number
Xclks
1
Base Period
(ns)
Receive Rate
(Megatransfers/s)
Send Rate
(Megatransfers/s)