LSI LSI53C1000, Technical Manual

Page: 109 / 384

MAD Bus Programming 3-17
3.9 MAD Bus Programming
The MAD[7:0] pins, in addition to serving as the address/data bus for the
local memory interface, also are used to program power-up options for
the chip. A particular option is programmed allowing the internal
pull-down current sink to pull the pin LOW at reset or by connecting a
4.7 k
Ω
resistor between the appropriate MAD[x] pin and V
DD
. The
pull-down resistors require that HC or HCT external components are
used for the memory interface. A description of the MAD bus pins
follows:
•
MAD[7], Serial EEPROM programmable option – When pulled
LOW by the internal pull-down current sink, the automatic data
download is enabled. When pulled HIGH by an external resistor, the
automatic data download is disabled. See
Section 2.4, “Serial
EEPROM Interface,” and the Subsystem ID (SID) and Subsystem
Vendor ID (SVID) register descriptions.
NC A1, A13, A23, AA14, AA15,
AA23, AB15, AB22, AC15,
AC16, B13, B16, B21, D16,
D22, D23, E20, E21, E22, E23,
F2, F20, F21, F22, F23, G3,
G21, G22, G23, H20, H21,
H22, H23, J20, J21, J22, J23,
K21, K22, K23, L20, L21, L22,
L23, M23, N20, N21, N22,
N23, P21, P22, P23, R20,
R21, R22, R23, T20, T21, T22,
T23, U21, U22, U23, V20, V21,
V22, V23, W20, W21, W22,
W23, Y21, Y22, Y23 N/A N/A These pins are reserved or have
no internal connection.
1. The I/O driver pad rows and digital core have isolated power supplies as indicated by the “I/O” and
“CORE” extensions on their respective V
SS
and V
DD
names. Connect the power and ground pins
directly to the primary power and ground planes of the circuit board. Apply bypass capacitors of
0.01
µ
F between adjacent V
SS
and V
DD
pairs wherever possible. Do not connect bypass capacitors
between V
SS
and V
DD
pairs that cross power and ground bus boundaries.
2. To reduce signal noise that can affect Frequency Synthesizer (FSN) functionality, place a ferrite bead
in series with the V
DD
_A and V
SS
_A pins. The recommended rating of the bead is 150
Ω
at
100 MHz.
Table 3.14 Power and Ground Signals (Cont.)
Name
1
Bump Type Strength Description