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Theory of Operation
2–8
Rev 02; February 8, 2002
2.4.2 Scatter Gather Table
The scatter gather table (or “DMA table”) performs “destination scatter gather”. The scatter gather table has 32K
Destination Descriptors, which define the size and address of the “small pages” of the destination buffers in host
memory. The Segment Size (SGSZ) register indicates how many Destination Descriptors are programmed in the
DMA Table. The Bus Master Controller automatically uses all of the programmed descriptors during the bus master
operation until the complete frame or image is transferred.
Each Destination Descriptor contains a destination address followed by a transfer count size. This allows support for
different transfer count sizes for each data block (dynamic transfer count).
2.4.3 Output Control Table
The Output Control Table (OCT) performs “source scatter gather”. The OCT is programmed to take advantage of
the storage format. Each table entry in the OCT is 32-bits and controls the transfer of up to 256 bytes of image data
from the buffer to the PCI interface circuitry. The addresses and count values are loaded into the bus master control-
ler to indicate the source data for bus master operations. During bus master transfer, the PCVisionplus reads the table
entries sequentially and transfers image data to the PCI-bus interface as directed. The OCT provides a very high
level of control and flexibility for bus master transfers. The OCT supports a variety of PCVisionplus features includ-
ing image re-sequencing and ROI (region of interest) output.
2.4.4 Output Formatting
The memory control and bus master controller work together to provide some additional hardware formatting during
bus master transfer. Clipping and Padding are mutually exclusive operations.
2.4.4.1 Region of Interest
PCVisionplus supports Region Of Interest (ROI) capability during bus master transfer. The OCT must be pro-
grammed to transfer an ROI subset of the image in PCVisionplus image memory. This can reduce PCI-bus band-
width requirements.
2.4.4.2 Zoom and Decimate
The PCVisionplus bus master controller (BMC) provides horizontal zoom by 2, zoom by 4, and decimate by 2 (1/2
zoom). This does not change the data in the image buffer memory. Vertical zoom or decimate must be handled by the
OCT. In 8-bit mode, each BYTE read is replicated in the BMC. In 12-bit mode, each WORD read is replicated in the
BMC.
In 8-bit mode and zoom by 2, each BYTE (8-bit pixel) read from image buffer memory is replicated twice (dupli-
cated) in the BMC before output to the PCI-bus, as shown in Figure 2–5. The transfer count must be doubled for
zoom by 2. The data output is twice the data read from the image memory.
In 8-bit mode and zoom by 4, each BYTE (8-bit pixel) read from the image buffer memory is replicated four times in
the BMC before output to the PCI-bus, as shown in Figure 2–5. The transfer count must be multiplied by four in
zoom by 4. The data output is four times the data read from the image memory.
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