PCVisionplus
Hardware Reference
Theory of Operation
2–5
Rev 02; February 8, 2002
2.3 IMAGE MEMORY
The PCVisionplus image memory is mapped as a 4MB region in the host system memory region. During power-up, a
base address to this region is assigned by the PCI-bus host system and stored in the Base Address Four (BADR4)
configuration register. PCVisionplus provides simultaneous access for host access and image acquisition.
The linear memory architecture provides flexibility for incoming images. There is no maximum limit for x,y sizes of
acquired data (within size of the image frame). Host access to the memory is always on DWORD (32-bit) bound-
aries. Every access provides four 8-bit pixels, two 16-bit pixels, or one 32-bit pixel.
2.3.1 Image Acquisition
The PCVisionplus supports interlaced or non-interlaced camera data. Interlaced data is stored as two separate fields,
and re-interlacing is accomplished by the bus master controller. Images can be any size within the 4MB size of
memory, on 8-byte (8 pixel) boundaries. Two types of image acquisition are available, External Trigger and Normal.
Normal acquisitions into memory are based only on camera frame timing. External Trigger acquisitions are based
on external trigger signals (and camera timing).
2.3.1.1 Normal Acquisition
The beginning and ending of a normal acquisition is based on the framing signal FEN (frame enable) out of the
PWG. FEN is the digital version of the Vertical Blank signal. A snap command performs a single frame acquire
beginning at the next FEN rising edge. A grab command performs continuous acquisition beginning on the next FEN
rising edge. A freeze command will stop a grab at the next falling edge of FEN. When acquiring interlaced images, a
snap lasts for two fields (1 frame). When acquiring non-interlaced images, a snap lasts for one field (1 frame). Inter-
laced image acquire can be programmed to start on the even field, odd field, or next field. Figure 2–2 shows an
example of a non-interlaced snap.
FEN
ACQMD = 0
ACQMD = 2
ACQMD = 0
Acquire
bits
valid data acquired
Data
Grab status
status shows snap
in progress
snap requested
Figure 2–2. Non-interlaced Acquire
Figure 2–3 shows an example of an interlaced snap with the field select bits set for odd field acquire. Field select bits
are used to determine which field of the interlaced image will be acquired first. Setting these bits for next field allows
either field, even or odd, to be acquired next.
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