General Lists
Name
Description
Logics.LE4.Timer Out
Signal: Timer Output
Logics.LE4.Out
Signal: Latched Output (Q)
Logics.LE4.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE4.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE5.Gate Out
Signal: Output of the logic gate
Logics.LE5.Timer Out
Signal: Timer Output
Logics.LE5.Out
Signal: Latched Output (Q)
Logics.LE5.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE5.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE6.Gate Out
Signal: Output of the logic gate
Logics.LE6.Timer Out
Signal: Timer Output
Logics.LE6.Out
Signal: Latched Output (Q)
Logics.LE6.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE6.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE7.Gate Out
Signal: Output of the logic gate
Logics.LE7.Timer Out
Signal: Timer Output
Logics.LE7.Out
Signal: Latched Output (Q)
Logics.LE7.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE7.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE8.Gate Out
Signal: Output of the logic gate
Logics.LE8.Timer Out
Signal: Timer Output
Logics.LE8.Out
Signal: Latched Output (Q)
Logics.LE8.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE8.Gate In1-I
State of the module input: Assignment of the Input Signal
1220
MCDLV4
DOK-HB-MCDLV4-2E
Содержание HighPROtec MCDLV4
Страница 1: ...Manual Line Differential Protection MCDLV4 Software Version 3 4 a DOK HB MCDLV4 2E Revision A English...
Страница 3: ...Order Code Order Code 3 MCDLV4 DOK HB MCDLV4 2E...
Страница 47: ...Installation and Connection 47 MCDLV4 DOK HB MCDLV4 2E...
Страница 164: ...Input Output and LED Settings 164 MCDLV4 DOK HB MCDLV4 2E...
Страница 433: ...Parameters 433 MCDLV4 DOK HB MCDLV4 2E...
Страница 457: ...Device Parameters 457 MCDLV4 DOK HB MCDLV4 2E...
Страница 473: ...Blockings 473 MCDLV4 DOK HB MCDLV4 2E...
Страница 822: ...Protective Elements Name Description Profibus Scada Cmd 16 Scada Command 822 MCDLV4 DOK HB MCDLV4 2E...
Страница 988: ...Protective Elements 988 MCDLV4 DOK HB MCDLV4 2E P P Q P Q P Q Q Q P S S...
Страница 989: ...Protective Elements 989 MCDLV4 DOK HB MCDLV4 2E Pr Q P Q P Qr...
Страница 1023: ...Protective Elements 1023 MCDLV4 DOK HB MCDLV4 2E...
Страница 1070: ...Supervision 1070 MCDLV4 DOK HB MCDLV4 2E...