Toshiba TMPR7901, User Manual

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Chapter 6: SDRAM Memory Controller
TX7901 User’s Manual (Rev. 6.30T – Nov, 2001)
6-13
In order to execute one of the above commands on the SDRAM, the following procedure
should occur:
1. The corresponding value should be written to the SDRAM Operation Mode Register.
2. OMR Write should be followed by a dummy write to the corresponding SDRAM. For
Mode Register Write, the RAS address [12:0] will be put in the Mode Register. To map
sysADDR into the RAS address, please see 6.6 Address Mapping.
3. SDRAM and SDRAM Controller initialization should be complete before writing 000 to
this register in order to place it back into the Normal SDRAM mode. Normal SDRAM
operation can then start.
6.5.2.1 Normal SDRAM Mode
0x0 should be written to the SDRAM Operation Mode Register to enable normal reading and
writing to the SDRAM.
Note: SDRAM and SDRAM Controller must be complete before entering this mode.
6.5.2.2 NOP Commands
NOP commands are used to issue NOPs to SDRAM when the DIMM is accessed. This
prevents unwanted commands from being registered during idle or wait states of the
initialization sequence.
6.5.2.3 Precharge All Banks
The Precharge All Banks command is used to deactivate the open row. The Precharge All
Banks command is the first command called after reset. In this mode, any write to a
particular DIMM causes the Precharge command to be issued. Once a bank has been
precharged, it is in the idle state and must be activated prior to any read or write commands
being issued to that bank. This sequence will be performed by the hardware sequencer.
6.5.2.4 Writing to the SDRAM Mode Register
Each DIMM has its own Mode Register. The Mode Register is used to define the specific
mode of operation for the SDRAM. This definition includes the selection of a burst length,
sdrCAS* latency, burst type, operating mode, etc. (Please see your SDRAM data sheet for
more information about this register.) Typically, the Mode Register of each SDRAM is
initialized during system boot-up and is kept static.
The parameter that the SDRAM Controller can change is the CAS latency. The burst length
must be programmed to 2. The bust type is Sequential. The Write Burst Mode is the
Programmed Burst Length. In order to change this parameter in the SDRAM’s Mode
Register:
1. The DIMM Parameter Registers are updated properly. DIMMs are precharged,
deactivated.
2. The SDRAM Operation Mode Register should be written to 0x3 to indicate a Write
Command to the SDRAM Mode Register.