Toshiba TMPR7901, User Manual

Page: 228 / 309

Chapter 12: 10/100 IEEE802.3 Media Access Controller
TX7901 User’s Manual (Rev. 6.30T – Nov, 2001)
12-20
Bit(s) Field R/W Description
7 RxC511M R/W Frames Received (256~511 byte) Counter Overflow Mask (0)
6 RxC255M R/W Frames Received (128~255 byte) Counter Overflow Mask (0)
5 RxC127M R/W Frames Received (65~127 byte) Counter Overflow Mask (0)
4 RxC64M R/W Frames Received (64 byte) Counter Overflow Mask (0)
3 RxCBCM R/W Broadcast Frames Received Counter Overflow Mask (0)
2 RxCMCM R/W Multicast Frames Received Counter Overflow Mask (0)
1 RxCFrmM R/W Readable Frames Received Counter Overflow Mask (0)
0 RxCByteM R/W Total Byte Received Counter Overflow Mask (0)
12.3.1.9 Receive Interrupt Register (RIReg)
The Receive Interrupt Register stores interrupt events. If an event occurs whose interrupt is
enabled by setting the corresponding bit in the Receive Interrupt Mask Register, it causes an
interrupt. This register is automatically cleared to zero after being read. Upon the completion
of reset, this register’s value is 0x0000_0000.
31 25 24 23 22 21 20 19 18 17 16
0
RxFB
Err
Rx
Stop
Rx
Read
Frm
Rx
Buf
Err
RxF
Overf
RxC
NoFi
F
RxC
No
Des
RxC
Jab
ExC
Frag
7 1 1 1 1 1 1 1 1 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RxC
Unds
RxC
NoAln
RxC
CRC
RxC
Err
RxC
Long
RxC
Pause
RxC
Gt1K
RxC
1K
RxC
511
RxC
255
RxC
127
RxC
64
RxC
BC
RxC
MC
RxC
Frm
RxC
Byte
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Table 12-16 RIReg Register Field Descriptions
Bit(s) Field R/W Description
31:25 - R/O Reserved (0x00)
24 RxFBErr R/W Receive Fatal Bus Error (0)
23 RxStop R/W Reception Stopped or Suspended (0)
22 RxReadFrm R/W Received a Readable Frame (0)
21 RxBufErr R/W Truncated Frame due to no more Descriptor (0)
20 RxFOverf R/W Receive FIFO Overflow Error (0)
19 RxCNoFiF R/W No RxFIFO Missed Frames Counter Overflow (0)
18 RxCNoDes R/W No RxDescriptor Missed Frame Counter Overflow (0)
17 RxCJab R/W Jabber Frames Received Counter Overflow (0)
16 ExCFrag R/W Fragments Received Counter Overflow (0)
15 RxCUnds R/W Undersized Frames Counter Overflow (0)
14 RxCNoAln R/W Misaligned Frames Counter Overflow (0)
13 RxCCRC R/W Frames Received with Bad CRC Counter Overflow (0)
12 RxCErr R/W Receive Errors Counter Overflow (0)
11 RxCLong R/W Long Frames Received Counter Overflow (0)
10 RxCPause R/W MAC Pause Frames Received Counter Overflow (0)
9 RxCGt1K R/W Frames Received (1024~max byte) Counter Overflow (0)
8 RxC1K R/W Frames Received (512~1023 byte) Counter Overflow (0)
7 RxC511 R/W Frames Received (256~511 byte) Counter Overflow (0)
6 RxC255 R/W Frames Received (128~255 byte) Counter Overflow (0)
5 RxC127 R/W Frames Received (65~127 byte) Counter Overflow (0)
4 RxC64 R/W Frames Received (64 byte) Counter Overflow (0)