Systemsoftware
2-26
System- and communication configuring D7-SYS - SIMADYN D
Edition 03.2001
Value(s) in
the buffer
memory
Value(s) from
the buffer
memory
Sampling time TA(n)
Sampling time TA (n+1)
System mode
Normal mode
Determine the inter-
mediate value corr.
to the block inputs
Output to the
hardware
Fig. 2-8
Sequence of the system mode for output blocks
As the system component is essentially restricted to the input and output
of hardware signals, the system mode is processed within just a few
micro seconds.
For several input/output blocks, the „DM“ block input can be used to
control whether an input/output is made in the system mode or in the
standard mode. For computation in the
standard mode
, the interface
signals at the blocks are computed, bypassing the process image within
the
standard mode
. For input blocks, the signals are read-in immediately
before being computed, and for output blocks, immediately after their
computation.
2.1.7.3 Process image for interrupt tasks
An interrupt task has essentially the same behavior as a cyclic task.
An interrupt task can interrupt a cyclic task running in the standard mode.
However it cannot be interrupted by cyclic tasks. Thus, e. g. for longer
computation times of an interrupt task, the start of cyclic tasks and
therefore output to the hardware can be delayed. This is because, for
output blocks with system mode, the signal is only output to the hardware
after the next task has been started.
Further it should be precisely checked when using input/output blocks
with the system mode within an interrupt task for non quasi-cyclic
interrupts. In this case, the output is only realized after the next interrupt
event whose timing is unknown. For specific input/output blocks, this
problem can be remedied by using a block input so that input/output is
realized in the standard mode.
Mode of operation
of an interrupt task
