Systemsoftware
System- and communication configuring D7-SYS - SIMADYN D
2-47
Edition 03.2001
A priority logic circuit ensures that only the highest priority component is
displayed. The lowest-priority component supplies a bit signal, which
changes-over the display from a CPU number display to an error display
(UER070.Q). If the highest priority error component is additionally
entered in the first error field, the error display is output flashing.
An acknowledge pulse only resets one error status of a component and
its display.
NOTE
If a displayed error is acknowledged, the error source is still present.
Before an error can be removed, the error cause must be determined and
removed.
When there are no errors, the processor number is displayed on the
7-segment display. If a component signals an error, then the appropriate
error code is output.
The status display on a T400 is realized via a diagnostics LED. The
flashing clock cycle is increased if the error is a first error.
The status display on a FM 458 is realized via fontside LEDs (refer to
User Manual "Application Module FM 458").
Identify acknowledge
Evaluate components
Display
Pushbutton,
service intervention
Acknowledge
pulse
Error code
Error status
7-segment display
Diagnostics LED
Status word, -bit
First error status
Fig. 2-13
Sequence diagram
Control using
priority logic
Display
Sequence diagram
