Renesas H8SX/1650, Hardware Manual

Page: 366 / 692

Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.2.00 Jun. 28, 2007 Page 344 of 666
REJ09B0311-0200
9.3.8 Timer Start Register (TSTR)
TSTR starts or stops operation for channels 0 to 5. When setting the operating mode in TMDR or
setting the count clock in TCR, first stop the TCNT counter.
7

0
R/W
6

0
R/W
5
CST5
0
R/W
4
CST4
0
R/W
3
CST3
0
R/W
2
CST2
0
R/W
1
CST1
0
R/W
0
CST0
0
R/W
Bit
Bit Name
Initial Value
R/W
Bit Bit Name
Initial
value R/W Description
7, 6

All 0 R/W Reserved
These bits are always read as 0. The write value should
always be 0.
5
4
3
2
1
0
CST5
CST4
CST3
CST2
CST1
CST0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Counter Start 5 to 0
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but the
TIOC pin output compare output level is retained. If TIOR
is written to when the CST bit is cleared to 0, the pin
output level will be changed to the set initial output value.
0: TCNT_5 to TCNT_0 count operation is stopped
1: TCNT_5 to TCNT_0 performs count operation