Renesas H8SX/1650, Hardware Manual

Page: 309 / 692

Section 8 I/O Ports
Rev.2.00 Jun. 28, 2007 Page 287 of 666
REJ09B0311-0200
Table 8.5 Available Output Signals and Settings in Each Port
Port
Output
Specification
Signal Name
Output
Signal
Name
Signal Selection
Register Settings Peripheral Module Settings
P1 2 SCK2_OE SCK2 When SCMR.SMIF = 1:
SCR.TE = 1 or SCR.RE = 1 while SMR.GM = 0,
SCR.CKE [1, 0] = 01 or while SMR.GM = 1
When SCMR.SMIF = 0:
SCR.TE = 1 or SCR.RE = 1
while SMR.C/A = 0, SCR.CKE [1, 0] = 01 or
while SMR.C/A = 1, SCR.CKE 1 = 0
0 TxD2_OE TxD2 SCR.TE = 1
P2 7 TIOCB5_OE TIOCB5 TPU.TIOR5.IOB3 = 0, TPU.TIOR5.IOB[1,0] = 01/10/11
PO7_OE PO7 NDERL.NDER7 = 1
6 TIOCA5_OE TIOCA5 TPU.TIOR5.IOA3 = 0, TPU.TIOR5.IOA[1,0] = 01/10/11
TMO1_OE TMO1 TCSR.OS3,2 = 01/10/11 or TCSR.OS[1,0] = 01/10/11
TxD1_OE TxD1 SCR.TE = 1
PO6_OE PO6 NDERL.NDER6 = 1
5 TIOCA4_OE TIOCA4 TPU.TIOR4.IOA3 = 0, TPU.TIOR4.IOA[1,0] = 01/10/11
PO5_OE PO5 NDERL.NDER5 = 1
4 TIOCB4_OE TIOCB4 TPU.TIOR4.IOB3 = 0, TPU.TIOR4.IOB[1,0] = 01/10/11
SCK1_OE SCK1 When SCMR.SMIF = 1:
SCR.TE = 1 or SCR.RE = 1 while
SMR.GM = 0, SCR.CKE [1, 0] = 01 or while SMR.GM = 1
When SCMR.SMIF = 0:
SCR.TE = 1 or SCR.RE = 1
while SMR.C/A = 0, SCR.CKE [1, 0] = 01 or
while SMR.C/A = 1, SCR.CKE 1 = 0
PO4_OE PO4 NDERL.NDER4 = 1
3 TIOCD3_OE TIOCD3 TPU.TMDR.BFB = 0, TPU.TIORL3.IOD3 = 0,
TPU.TIORL3.IOD[1,0] = 01/10/11
PO3_OE PO3 NDERL.NDER3 = 1