Renesas H8SX/1650, Hardware Manual

Page: 253 / 692

Section 7 Data Transfer Controller (DTC)
Rev.2.00 Jun. 28, 2007 Page 231 of 666
REJ09B0311-0200
7.5 Operation
The DTC stores transfer information in the data area. When activated, the DTC reads transfer
information that is stored in the data area and transfers data on the basis of that transfer
information. After the data transfer, it writes updated transfer information back to the data area.
Since transfer information is in the data area, it is possible to transfer data over any required
number of channels. There are three transfer modes: normal, repeat, and block.
The DTC specifies the source address and destination address in SAR and DAR, respectively.
After a transfer, SAR and DAR are incremented, decremented, or fixed independently.
Table 7.2 shows the DTC transfer modes.
Table 7.2 DTC Transfer Modes
Transfer
Mode Size of Data Transferred at
One Transfer Request Memory Address Increment or
Decrement Transfer
Count
Normal 1 byte/word/longword Incremented/decremented by 1, 2,
or 4, or fixed 1 to 65536
Repeat *
1
1 byte/word/longword Incremented/decremented by 1, 2,
or 4, or fixed 1 to 256 *
3
Block
*
2
Block size specified by CRAH
(1 to 256 bytes/words/longwords) Incremented/decremented by 1, 2,
or 4, or fixed 1 to 65536
Notes: 1. Either source or destination is specified to repeat area.
2. Either source or destination is specified to block area.
3. After transfer of the specified transfer count, initial state is recovered to continue the
operation.
Setting the CHNE bit in MRB to 1 makes it possible to perform a number of transfers with a
single activation (chain transfer). Setting the CHNS bit in MRB to 1 can also be made to have
chain transfer performed only when the transfer counter value is 0.
Figure 7.4 shows a flowchart of DTC operation, and table 7.3 summarizes the chain transfer
conditions (combinations for performing the second and third transfers are omitted).