Renesas H8SX/1650, Hardware Manual

Page: 279 / 692

Section 8 I/O Ports
Rev.2.00 Jun. 28, 2007 Page 257 of 666
REJ09B0311-0200
8.1 Register Descriptions
Table 8.2 lists each port registers.
Table 8.2 Register Configuration in Each Port
Registers
Port
Number of
Pins
DDR DR PORT ICR PCR ODR
Port 1 8 O O O O
 
Port 2 8 O O O O

O
Port 3 8 O O O O
 
Port 5 8
 
O O
 
Port 6 *
1
6 O O O O
 
Port A 8 O O O O
 
Port B
*
2
4 O O O O
 
Port D 8 O O O O O

Port E 8 O O O O O

Port F 8 O O O O O O
Port H 8 O O O O O

Port I 8 O O O O O

[Legend]
O: Register exists

: No register exists
Notes: 1. The lower six bits are valid and the upper two bits are reserved. The write value should
always be the initial value.
2. The lower four bits are valid and the upper four bits are reserved. The write value
should always be the initial value.