Renesas H8SX/1650, Hardware Manual

Page: 217 / 692

Section 6 Bus Controller (BSC)
Rev.2.00 Jun. 28, 2007 Page 195 of 666
REJ09B0311-0200
6.9.7 Wait Control
In the data cycle of the address/data multiplexed I/O interface, program wait insertion and pin wait
insertion by the
WAIT
pin are enabled in the same way as in the basic bus interface. For details,
see section 6.6.4, Wait Control.
Wait control settings do not affect the address cycles.
6.9.8 Read Strobe (
RD
) Timing
In the address/data multiplexed I/O interface, the read strobe timing of data cycles can be modified
in the same way as in basic bus interface. For details, see section 6.6.5, Read Strobe (
RD
) Timing.
Figure 6.31 shows an example when the read strobe timing is modified.
T
ma1
T
ma2
T
2
T
1
B
φ
Address bus
D7 to D0
D7 to D0
Address cycle Data cycle
CSn
RD
AH
RD
BS
RD/
WR
Note: n = 3 to 7
Address Read data
Address
Read
data
RDNn = 0
RDNn = 1
Figure 6.31 Read Strobe Timing