NXP Semiconductors KE1xF Series, Reference Manual, Page: 345 / 1483

MSCM memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_103C Processor 0 Configuration Register (MSCM_CP0CFG3) 32 R See section 15.3.11/352
4000_1400 On-Chip Memory Descriptor Register (MSCM_OCMDR0) 32 R/W See section 15.3.12/353
4000_1404 On-Chip Memory Descriptor Register (MSCM_OCMDR1) 32 R/W See section 15.3.12/353
4000_1408 On-Chip Memory Descriptor Register (MSCM_OCMDR2) 32 R/W See section 15.3.12/353
4000_140C On-Chip Memory Descriptor Register (MSCM_OCMDR3) 32 R/W See section 15.3.12/353
15.3.2 Processor X Type Register (MSCM_CPxTYPE)
The register provides a CPU-specific response indicating the personality of the core
making the access. The 32 bit response includes 3 ASCII characters defining the CPU
type along with a byte defining the logical revision number. The logical revision number
follows ARM’s rYpZ nomenclature.
Address: 4000_1000h base + 0h offset = 4000_1000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
PERSONALITY RYPZ
W
Reset
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Notes:
PERSONALITY field: See bit field description •
RYPZ field: See bit field description •
MSCM_CPxTYPE field descriptions
Field Description
31–8
PERSONALITY
Processor x Personality
This read-only field defines the processor personality for CPx
if CPx = Cortex-M4, then PERSONALITY = 0x43_4D_34 (“CM4”).
RYPZ Processor x Revision
This read-only field defines the processor revision for CPx:
0x01 corresponds to the r0p1 core release.
...
Chapter 15 Miscellaneous System Control Module (MSCM)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 345