NXP Semiconductors KE1xF Series, Reference Manual, Page: 1005 / 1483

FTMx_FILTER field descriptions (continued)
Field Description
11–8
CH2FVAL
Channel 2 Input Filter
Selects the filter value for the channel input.
The filter is disabled when the value is zero.
7–4
CH1FVAL
Channel 1 Input Filter
Selects the filter value for the channel input.
The filter is disabled when the value is zero.
CH0FVAL Channel 0 Input Filter
Selects the filter value for the channel input.
The filter is disabled when the value is zero.
41.4.20 Fault Control (FTMx_FLTCTRL)
This register selects the filter value for the fault inputs, enables the fault inputs and the
fault inputs filter. This register also controls the output state when a fault event happens.
Address: Base a 7Ch offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
FSTATE
0
FFVAL
FFLTR3EN FFLTR2EN FFLTR1EN FFLTR0EN FAULT3EN FAULT2EN FAULT1EN FAULT0EN
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_FLTCTRL field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15
FSTATE
Fault output state
This configuration allows to put the FTM outputs tri-stated when a fault event is ongoing.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
Table continues on the next page...
Chapter 41 FlexTimer Module (FTM)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 1005