NXP Semiconductors KE1xF Series, Reference Manual, Page: 116 / 1483

8.2 Introduction
The memory protection unit (MPU) provides hardware access control for all memory
references generated in the device.
8.3 Overview
The MPU concurrently monitors all system bus transactions and evaluates their
appropriateness using pre-programmed region descriptors that define memory spaces and
their access rights. Memory references that have sufficient access control rights are
allowed to complete, while references that are not mapped to any region descriptor or
have insufficient rights are terminated with a protection error response.
8.3.1 Block diagram
A simplified block diagram of the MPU module is shown in the following figure.
Slave Port n Internal
Region
Descriptor 0
Region
Descriptor 1
Region
Descriptor x
Access
Evaluation
Macro
Access
Evaluation
Macro
Access
Evaluation
Macro
Mux
Address Phase Signals Peripheral Bus
MPU_EAR n MPU_EDR n
Figure 8-1. MPU block diagram
Introduction
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
116 NXP Semiconductors