
FLEXIO_CTRL field descriptions
Field
Description
31
DOZEN
Doze Enable
Disables FlexIO operation in Doze modes. This field is ignored and the FlexIO always disabled in low-
leakage stop modes.
0
FlexIO enabled in Doze modes.
1
FlexIO disabled in Doze modes.
30
DBGE
Debug Enable
Enables FlexIO operation in Debug mode.
0
FlexIO is disabled in debug modes.
1
FlexIO is enabled in debug modes
29–3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
FASTACC
Fast Access
Enables fast register accesses to FlexIO registers, but requires the FlexIO clock to be at least twice the
frequency of the bus clock.
0
Configures for normal register accesses to FlexIO
1
Configures for fast register accesses to FlexIO
1
SWRST
Software Reset
The FlexIO Control Register is not affected by the software reset, all other logic in the FlexIO is affected by
the software reset and register accesses are ignored until this bit is cleared. This register bit will remain
set until cleared by software, and the reset has cleared in the FlexIO clock domain.
0
Software reset is disabled
1
Software reset is enabled, all FlexIO registers except the Control Register are reset.
0
FLEXEN
FlexIO Enable
0
FlexIO module is disabled.
1
FlexIO module is enabled.
49.3.4 Pin State Register (FLEXIO_PIN)
Address: 4005_A000h base + Ch offset = 4005_A00Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory Map/Register Definition
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
1342
NXP Semiconductors
Summary of Contents for KE1xF Series
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