NXP Semiconductors KE1xF Series, Reference Manual, Page: 1134 / 1483

LPITx_TVALn field descriptions (continued)
Field Description
In compare modes, sets the timer channel start value. The timer will count down until it reaches 0, then it
will generate an interrupt and load this register value again. Writing a new value to this register will not
restart the timer channel; instead the value will be loaded after the timer expires. To abort the current cycle
and start a timer period with the new value, the timer channel must be disabled and enabled again.
In capture modes, this register stores the inverse of the counter whenever the trigger asserts.
0 Invalid load value in compare modes
>0 Value to be loaded (Compare Mode) or Value of Timer (Capture Mode)
42.4.9 Current Timer Value (LPITx_CVALn)
These registers indicate the current timer counter value.
NOTE
While the timer is running, CVALn register reads may not
return the real value.
Address: 4003_7000h base + 24h (16d × i), where i=0d to 3d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
TMR_CUR_VAL
W
Reset
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
LPITx_CVALn field descriptions
Field Description
TMR_CUR_VAL Current Timer Value
Represents the current timer value, if the timer is enabled.
Memory Map and Registers
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
1134 NXP Semiconductors