
The move-in process is not atomic, in such a way that it is immediately cancelled by the
inactivation of the destination Mailbox (see
Mailbox may be left partially updated, thus incoherent. The exception is if the move-in
destination is an Rx FIFO Message Buffer, then the process cannot be cancelled.
The BUSY Bit (least significant bit of the CODE field) of the destination Message Buffer
is asserted while the move-in is being performed to alert the CPU that the Message
Buffer content is temporarily incoherent.
50.5.5.2 Move-out
The move-out process is the copy of the content from a Tx Mailbox to the Tx SMB when
a message for transmission is available (see Section "Arbitration process"). The move-out
occurs in the following conditions:
• The first bit of Intermission field
• During Bus Off state when TX Error Counter is in the 124 to 128 range
• During Bus Idle state
• During Wait For Bus Idle state
The move-out process is not atomic. Only the CPU has priority to access the memory
concurrently out of Bus Idle state. In Bus Idle, the move-out has the lowest priority to the
concurrent memory accesses.
50.5.6 Data coherence
In order to maintain data coherency and FlexCAN proper operation, the CPU must obey
the rules described in
.
50.5.6.1 Transmission abort mechanism
The abort mechanism provides a safe way to request the abortion of a pending
transmission. A feedback mechanism is provided to inform the CPU if the transmission
was aborted or if the frame could not be aborted and was transmitted instead.
Two primary conditions must be fulfilled in order to abort a transmission:
• CAN_MCR[AEN] bit must be asserted
• The first CPU action must be the writing of abort code (0b1001) into the CODE field
of the Control and Status word.
Chapter 50 CAN (FlexCAN)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors
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