NXP Semiconductors KE1xF Series, Reference Manual, Page: 1031 / 1483

41.5.5 Input Capture mode
The Input Capture mode is selected when:
• DECAPEN = 0
• COMBINE = 0
• CPWMS = 0
• MSB:MSA = 0:0, and
• ELSB:ELSA ≠ 0:0
When a selected edge occurs on the channel input, the current value of the FTM counter
is captured into the CnV register, at the same time the CHF bit is set and the channel
interrupt is generated if enabled by CHIE = 1. See the following figure.
When a channel is configured for input capture, the FTMxCHn pin is an edge-sensitive
input. ELSB:ELSA control bits determine which edge, falling or rising, triggers input-
capture event. Note that the maximum frequency for the channel input signal to be
detected correctly is FTM input clock divided by 4, which is required to meet Nyquist
criteria for signal sampling.
Writes to the CnV register is ignored in Input Capture mode.
While in Debug mode, the input capture function works as configured. When a selected
edge event occurs, the FTM counter value, which is frozen because of Debug, is captured
into the CnV register and the CHF bit is set.
1
is filter
enabled?
edge
detector
was falling
edge selected?
was rising
edge selected?
rising edge
falling edge
0
1
1
0
0 0
CnV
FTM counter
channel (n) interrupt
CHIE
CHF
Filter*
0
* Filtering function is only available in the inputs of channel 0, 1, 2, and 3
FTM input clock
divided
by 4
channel (n) input
FLTPS[3:0]
synchronizer
CLK
D
Q
filter
prescaler
CLK
D
Q
filter clock
Figure 41-10. Input Capture mode
Chapter 41 FlexTimer Module (FTM)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 1031