NXP Semiconductors KE1xF Series, Reference Manual, Page: 1420 / 1483

CANx_ESR2 field descriptions (continued)
Field Description
• During arbitration, if an CAN_ESR2[LPTM] is found and it is inactive.
• If CAN_ESR2[IMB] is not asserted and a frame is transmitted successfully.
This bit is cleared in all start of arbitration (see Section "Arbitration process").
NOTE: CAN_ESR2[LPTM] mechanism have the following behavior: if an MB is successfully transmitted
and CAN_ESR2[IMB]=0 (no inactive Mailbox), then CAN_ESR2[VPS] and CAN_ESR2[IMB] are
asserted and the index related to the MB just transmitted is loaded into CAN_ESR2[LPTM].
0 If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox.
1 If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the
first one.
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
50.4.14 CRC Register (CANx_CRCR)
This register provides information about the CRC of transmitted messages. This register
is updated at the same time the Tx Interrupt Flag is asserted.
NOTE
Refer to CRC sequence calculation in the CAN Protocol
standard (ISO 11898-1) for details.
Address: Base a 44h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0 MBCRC
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 TXCRC
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CANx_CRCR field descriptions
Field Description
31–23
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
22–16
MBCRC
CRC Mailbox
This field indicates the number of the Mailbox corresponding to the value in CAN_CRCR[TXCRC] field.
15
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Table continues on the next page...
Memory map/register definition
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
1420 NXP Semiconductors