NXP Semiconductors KE1xF Series, Reference Manual, Page: 519 / 1483

21.4.1.19.3 Fields
Field Function
31
PR
Enable
This bit shows whether the peripheral is present on this device.
0b - Peripheral is not present.
1b - Peripheral is present.
30
CGC
Clock Control
This read/write bit enables the clock for the peripheral.
0b - Clock disabled
1b - Clock enabled
29
INUSE
Clock Gate Control
>This read-only bit shows that this peripheral is being used .
0b - Peripheral is not being used.
1b - Peripheral is being used. Software cannot modify the existing clocking configuration.
28-27
—
This read-only bit field is reserved and always has the value 0.
26-24
PCS
Peripheral Clock Source Select
This read/write bit field is used for peripherals that support various clock selections.
This field can only be written when the CGC bit is 0 (clock disabled). Likewise, if the INUSE flag is set,
this field is locked.
000b - Clock is off .
001b - System Oscillator Bus Clock.
010b - Slow IRC Clock.
011b - Fast IRC Clock.
100b - Reserved.
101b - Reserved.
110b - System PLL clock.
111b - Reserved.
23-4
—
This read-only bit field is reserved and always has the value 0.
3
—
This read-only bit field is reserved and always has the value 0.
2-0
—
This read-only bit field is reserved and always has the value 0.
21.4.1.20 PCC ADC0 (PCC_ADC0)
21.4.1.20.1 Address
Register Offset
PCC_ADC0 400650ECh
Chapter 21 Peripheral Clock Controller (PCC)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 519