NXP Semiconductors KE1xF Series, Reference Manual, Page: 713 / 1483

30.3.2 Watchdog Counter Register (WDOG_CNT)
This section describes the watchdog counter register.
The watchdog counter register provides access to the value of the free-running watchdog
counter. Software can read the counter register at any time.
Software cannot write directly to the watchdog counter; however, two write sequences to
these registers have special functions:
1. The refresh sequence resets the watchdog counter to 0x0000. See the "Refreshing the
Watchdog" section.
2. The unlock sequence allows the watchdog to be reconfigured without forcing a reset
(when CS[UPDATE] = 1). See the "Configure for reconfigurable" section.
NOTE
All other writes to this register are illegal and force a reset.
Address: 4005_2000h base + 4h offset = 4005_2004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CNTHIGH CNTLOW
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
WDOG_CNT field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15–8
CNTHIGH
High byte of the Watchdog Counter
CNTLOW Low byte of the Watchdog Counter
30.3.3 Watchdog Timeout Value Register (WDOG_TOVAL)
This section describes the watchdog timeout value register. TOVAL contains the 16-bit
value used to set the timeout period of the watchdog.
The watchdog counter (CNT) is continuously compared with the timeout value
(TOVAL). If the counter reaches the timeout value, the watchdog forces a reset triggering
event.
Chapter 30 Watchdog timer (WDOG)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 713