10
10-205
Ver.0.10
MULTIJUNCTION TIMERS
10.9 TOM (Output-related 16-bit Timer)
10.9.2 Outline of Each Mode of TOM
Each mode of TOM is outlined below. For each TOM channel, only one of the following modes can
be selected.
(1) PWM output mode (without correction function)
In PWM output mode, the timer uses two reload registers to generate a waveform with a given
duty cycle.
When after setting the initial values in reload 0 and reload 1 registers, the timer is enabled (by
writing to the enable bit in software or by TID2 underflow/overflow signal), it loads the reload 0
register value into the counter synchronously with the count clock, letting the counter start
counting down. The first time the counter underflows, the reload 1 register value is loaded into the
counter letting it continue counting. Thereafter, the counter is reloaded with the reload 0 and
reload 1 register values alternately each time an underflow occurs.
The F/F output waveform in PWM output mode is inverted at count startup and upon each
underflow. The timer stops at the same time count is disabled by writing to the enable bit (and not
in synchronism with PWM output period). An interrupt can be generated when the counter
underflows every other time (second time, fourth time, and so on) after being enabled.
(2) Single-shot output mode (without correction function)
In single-shot output mode, the timer generates a pulse in width of (reload 0 register set value +
1) only once and stops without performing any operation.
When after setting the reload 0 register, the timer is enabled (by writing to the enable bit in
software or by using TID2 underflow/overflow signal), it loads the content of reload 0 register into
the counter synchronously with the count clock, letting the counter start counting. The counter
counts down clock pulses and stops when it underflows after reaching the minimum count.
The F/F output waveform in single-shot output mode is inverted at startup and upon underflow,
generating a single-shot pulse waveform in width of (reload 0 register set value + 1) only once.
Also, an interrupt can be generated when the counter underflows.
Summary of Contents for M32170F3VFP
Page 42: ...1 1 24 Ver 0 10 OVERVIEW 1 4 Pin Layout This is a blank page ...
Page 56: ...2 2 14 Ver 0 10 This is a blank page ...
Page 88: ...3 3 32 Ver 0 10 ADDRESS SPACE 3 7 Notes on Address Space This is a blank page ...
Page 270: ...9 9 40 Ver 0 10 DMAC 9 4 Precautions about the DMAC This is a blank page ...
Page 614: ...12 12 64 Ver 0 10 This is a blank page SERIAL I O 12 9 Precautions on Using UART Mode ...
Page 756: ...17 17 10 Ver 0 10 RAM BACKUP MODE 17 4 Exiting RAM Backup Mode Wakeup This is a blank page ...
Page 762: ...18 18 6 Ver 0 10 OSCILLATION CIRCUIT 18 2 Clock Generator Circuit This is a blank page ...
Page 831: ...CHAPTER 22 CHAPTER 22 TYPICAL CHARACTERISTICS 22 1 A D Conversion Characteristics ...
Page 833: ...Appendix 1 1 Dimensional Outline Drawing APPENDIX 1 APPENDIX 1 MECHANICAL SPECIFICATIONS ...
Page 841: ...Appendix 3 1 Precautions about Noise APPENDIX 3 APPENDIX 3 PRECAUTIONS ABOUT NOISE ...