11
11-3
Ver.0.10
Table 11.1.1 outlines the A-D converters. Figures 11.1.1 and 11.1.2 show block diagrams of A-D0
and A-D1 converters, respectively.
Table 11.1.1 Outline of A-D Converters
Item
Content
Analog input
16 channels x 2
A-D conversion method
Successive approximation method
Resolution
10 bits (Conversion results can be read out in either 8 bits or 10 bits)
Nonlinearity error (Note1) (Conditions: Normal rate mode
±2LSB
Ta = 25°C,AVCC0,1=VREF0,1=5.12V)
Double rate mode
±2LSB
Conversion mode
A-D conversion mode, comparator mode
Operation mode
Single mode, scan mode
Scan mode
Single-shot scan mode, continuous scan mode
Conversion start trigger
Software start
Started by setting A-D converter start bit to 1
Hardware start
A-D0 converter started by MJT output event
bus 3, A-D1 converter started by TID1
overflow or underflow (Note 2)
__________
Started by external ADTRG pin input
Conversion rate
During single mode
Normal rate
299
×
1/f(BCLK) (Note 3)
f(BCLK):
(shortest time)
Double rate
173
×
1/f(BCLK)
Internal peripheral clock
During comparator mode Normal rate
47
×
1/f(BCLK)
operating frequency
(shortest time)
Double rate
29
×
1/f(BCLK)
Interrupt request generation function
Generated at completion of A-D conversion, comparate operation,
single-shot scan operation, or one cycle of continuous scan operation
DMA transfer request generation
Generated at completion of A-D conversion, comparate operation,
function (Note 4)
single-shot scan operation, or one cycle of continuous scan operation
Note 1: The nonlinearity error is a deviation from ideal conversion characteristics after the offset and full-scale
errors are adjusted to 0.
Note 2: Refer to Chapter 10, "Multijunction Timers."
Note 3: When BCLK = 20 MHz, this is 1/f(BCLK) = 50 ns.
Note 4: The DMA transfer request generation function is available for only the A-D0 converter. The A-D1
converter does not have this function.
A-D CONVERTERS
11.1 Outline of A-D Converters
Summary of Contents for M32170F3VFP
Page 42: ...1 1 24 Ver 0 10 OVERVIEW 1 4 Pin Layout This is a blank page ...
Page 56: ...2 2 14 Ver 0 10 This is a blank page ...
Page 88: ...3 3 32 Ver 0 10 ADDRESS SPACE 3 7 Notes on Address Space This is a blank page ...
Page 270: ...9 9 40 Ver 0 10 DMAC 9 4 Precautions about the DMAC This is a blank page ...
Page 614: ...12 12 64 Ver 0 10 This is a blank page SERIAL I O 12 9 Precautions on Using UART Mode ...
Page 756: ...17 17 10 Ver 0 10 RAM BACKUP MODE 17 4 Exiting RAM Backup Mode Wakeup This is a blank page ...
Page 762: ...18 18 6 Ver 0 10 OSCILLATION CIRCUIT 18 2 Clock Generator Circuit This is a blank page ...
Page 831: ...CHAPTER 22 CHAPTER 22 TYPICAL CHARACTERISTICS 22 1 A D Conversion Characteristics ...
Page 833: ...Appendix 1 1 Dimensional Outline Drawing APPENDIX 1 APPENDIX 1 MECHANICAL SPECIFICATIONS ...
Page 841: ...Appendix 3 1 Precautions about Noise APPENDIX 3 APPENDIX 3 PRECAUTIONS ABOUT NOISE ...