12
12-61
Ver.0.10
SERIAL I/O
12.8 Fixed Period Clock Output Function
12.8 Fixed Period Clock Output Function
When using SIO0, SIO1, SIO4 or SIO5 in UART mode, you can choose the relevant port (P84, P87,
P65 or P66) to function as the SCLKO0, SCLKO1, SCLKO4 or SCLKO5 pin. In this way, a clock
derived from BRG output by dividing it by 2 can be output from the SCLKO pin.
Note : This clock is output all the time, not just during data transfer.
Figure 12.8.1 Example of Fixed Period Clock Output
SCLKO
TXD
RXD
Clock output to
peripheral circuits
UART transmit/receive
ST
SP
Data
ST
SP
Data
50%
50%
BRG period
Internal BRG
output
SCLKO output
1. Configuration when using BRG/2 clock
2. Operation timing
Summary of Contents for M32170F3VFP
Page 42: ...1 1 24 Ver 0 10 OVERVIEW 1 4 Pin Layout This is a blank page ...
Page 56: ...2 2 14 Ver 0 10 This is a blank page ...
Page 88: ...3 3 32 Ver 0 10 ADDRESS SPACE 3 7 Notes on Address Space This is a blank page ...
Page 270: ...9 9 40 Ver 0 10 DMAC 9 4 Precautions about the DMAC This is a blank page ...
Page 614: ...12 12 64 Ver 0 10 This is a blank page SERIAL I O 12 9 Precautions on Using UART Mode ...
Page 756: ...17 17 10 Ver 0 10 RAM BACKUP MODE 17 4 Exiting RAM Backup Mode Wakeup This is a blank page ...
Page 762: ...18 18 6 Ver 0 10 OSCILLATION CIRCUIT 18 2 Clock Generator Circuit This is a blank page ...
Page 831: ...CHAPTER 22 CHAPTER 22 TYPICAL CHARACTERISTICS 22 1 A D Conversion Characteristics ...
Page 833: ...Appendix 1 1 Dimensional Outline Drawing APPENDIX 1 APPENDIX 1 MECHANICAL SPECIFICATIONS ...
Page 841: ...Appendix 3 1 Precautions about Noise APPENDIX 3 APPENDIX 3 PRECAUTIONS ABOUT NOISE ...