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4
4-11
Ver.0.10
4.8 Exception Processing
4.8.1 Reserved Instruction Exception (RIE)
[Occurrence Conditions]
Reserved Instruction Exception (RIE) is generated when execution of a reserved instruction
(unimplemented instruction) is detected. Instruction check is performed on the op-code part of
the instruction.
When a reserved instruction exception occurs, the instruction which generated it is not executed.
If an external interrupt is requested at the same time a reserved instruction exception is detected,
it is the reserved instruction exception that is accepted.
[EIT Processing]
(1) Saving SM, IE, and C bits
The SM, IE, and C bits of the PSW register are saved to their backup bits – the BSM, BIE,
and BC bits.
BSM
←
SM
BIE
←
IE
BC
←
C
(2) Updating SM, IE, and C bits
The SM, IE, and C bits of the PSW register are updated as shown below.
SM
←
Unchanged
BIE
←
0
BC
←
0
(3) Saving PC
The PC value of the instruction that generated the reserved instruction exception is set in
the BPC register. For example, if the instruction that generated the reserved instruction
exception is at address 4, the value 4 is set in the BPC register. Similarly, if the instruction
is at address 6, the value 6 is set in the BPC register. In this case, the value of the BPC
register bit 30 indicates whether the instruction that generated the reserved instruction
exception resides on a word boundary (BPC[30] = 0) or not on a word boundary (BPC[30]
= 1).
However, in either case of the above, the address to which the "RTE" instruction returns
after completion of processing by the EIT handler is address 4. (This is because the two
low-order bits are cleared to "00" when returning to the PC.)
EIT
4.8 Exception Processing
Summary of Contents for M32170F3VFP
Page 42: ...1 1 24 Ver 0 10 OVERVIEW 1 4 Pin Layout This is a blank page ...
Page 56: ...2 2 14 Ver 0 10 This is a blank page ...
Page 88: ...3 3 32 Ver 0 10 ADDRESS SPACE 3 7 Notes on Address Space This is a blank page ...
Page 270: ...9 9 40 Ver 0 10 DMAC 9 4 Precautions about the DMAC This is a blank page ...
Page 614: ...12 12 64 Ver 0 10 This is a blank page SERIAL I O 12 9 Precautions on Using UART Mode ...
Page 756: ...17 17 10 Ver 0 10 RAM BACKUP MODE 17 4 Exiting RAM Backup Mode Wakeup This is a blank page ...
Page 762: ...18 18 6 Ver 0 10 OSCILLATION CIRCUIT 18 2 Clock Generator Circuit This is a blank page ...
Page 831: ...CHAPTER 22 CHAPTER 22 TYPICAL CHARACTERISTICS 22 1 A D Conversion Characteristics ...
Page 833: ...Appendix 1 1 Dimensional Outline Drawing APPENDIX 1 APPENDIX 1 MECHANICAL SPECIFICATIONS ...
Page 841: ...Appendix 3 1 Precautions about Noise APPENDIX 3 APPENDIX 3 PRECAUTIONS ABOUT NOISE ...