Processor modules
ADwin
14
ADwin-Pro
Hardware, manual version 2.9, June 2006
5.2.1 Pro-CPU-T9
Fig. 16 – Pro-CPU-T9: Block diagram
Fig. 18 – Pro-CPU-T9: Pin assignment
Fig. 19 – Pro-CPU-T9: Board and front panel
To be used for Pro system
Pro I
Processor
ADSP 21062
Clock rate
40MHz
Data connection
Link
Internal memory
256kB, optional 512kB
External memory
4MB, optional 16 oder 32MB
TTL-signal inputs
Event In
Fig. 17 –
: Specifikation
DA
T
A
ADDRESS
ADw
in
-P
ro
bu
s
ext. Memory
SRAM
3 MB
DRAM
4/16/32/64 MB
EVENT IN
Link 0
Data
Address
SHARC
™
ADSP 21062
from Analog Devices with
2 MBit internal SRAM
/RESET
LINK OUT (-)
/ERROE
LINK IN (-)
GND
LINK OUT (+)
/ANALYSE
LINK IN (+)
nc
1
2
3
4
5
6
7
8
9
8921
721
721
721
LS
09
ON
1 2
19DSPIF01
DC-DC-converter
LS
19
706
FPGA
FP
G
A
FP
G
A
ADSP-21062
IM
S
C
011
OCX
CPU-T9
ADwin-Pro
0
LINK
EVENT IN
