Jäger ADwin-Pro, System And Hardware Description

Page: 130 / 218

Pro I: Digital-I/O- and Counter Modules
Pro-CO4-T Rev. A
ADwin
126
ADwin-Pro Hardware, manual version 2.9, June 2006
Event input This input, as far as it has been released, can start an externally triggered
ADbasic process.
Fig. 240 – Pro-CO4-T Rev. A : Board and front panel
Fig. 241 – Pro-CO4-T Rev. A : Pin assignment Pro-CO4-T
Counter 4 multi-purpose counters
Counter resolution 32 bit
Input / output level TTL logic
Event input TTL logic
Reference clock 40MHz (100 ppm)
Clock frequency four edge evaluation 5MHz max. (at 90° phase-shift of the
signals)
Clock frequency up/down counter 20MHz max.
Reference frequency PWM analysis 40MHz
Connector 37-pin DSub socket
Power consumption approx. 150mA
Isolation No (see page 127 )
Fig. 242 – Pro-CO4-T Rev. A : Specification
19DIOCNT0101
A0 A1 A2 A3 A4 A5 A6 A7
OCX
40MHz
LT
C
485
AT17LV010
LM3940-3.3
XILINX
SPARTAN
XC2S150
LM3937-2.5
AD
M
706
AD
M
706
ON DIP
1 2 3 4 5 6 7 8
7S
08B
74
HCT
24
5
74
HCT
24
5
74H
C
T
245
74H
C
T
245
CO4-T
COUNTER
INPUT
CNTR 1 DIR
CNTR 1 B
CNTR 2 DIR
CNTR 2 B
CNTR 3 DIR
CNTR 3 B
CNTR 4 DIR
CNTR 4 B
DGND
EVENT-IN
CNTR 1 CLR/LATCH
CNTR 1 CLK/PWM
CNTR 1 A
RESERVED
CNTR 2 CLR/LATCH
CNTR 2 CLK/PWM
CNTR 2 A
RESERVED
CNTR 3 CLR/LATCH
CNTR 3 CLK/PWM
CNTR 3 A
RESERVED
CNTR 4 CLR/LATCH
CNTR 4 CLK/PWM
CNTR 4 A
RESERVED
DGND
+5V, <100mA (fused)
DGND
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
RESERVED
RESERVED
RESERVED
RESERVED