Jäger ADwin-Pro, System And Hardware Description

Page: 137 / 218

ADwin-Pro Hardware, manual version 2.9, June 2006
133
Pro I: Digital-I/O- and Counter Modules
Pro-PWM-4 Rev. A
ADwin
Fig. 255 – Pro-PWM-4 Rev. A : Board and front panel
Information about programming and programming examples can be found
after the description of the module
Pro-PWM-4-I Rev. A .
Output channels 4 PWM channels
Outputs TTL
Counter-/register width 16 bit
f
clk
after
Prescaler
Div. by 1 (2
0
) 200ns (5MHz)
Div. by 2 (2
1
) 400ns (2.5MHz)
Div. by 4 (2
2
) 800ns (1.25MHz)
…
Div. by 128 (2
7
) 25.6µs (
≈
39kHz)
V
OH
2.4V min.
V
OL
0.8V max.
Output current 5mA per channel max.
Event input Positive TTL
Connector 37-pin DSub socket
Isolation No (see page 134 )
Fig. 256 – Pro-PWM-4 Rev. A : Specification
19CNT01
ON
1 2 3 4 5 6 7 8
A0 A1 A2 A3 A4 A5 A6 A7
FPGA FPGA
A
B
T
16245
LS19
LS19
LS19
LS19
LS19
LS19
LS19
OCX
FPGA FPGA
FP
G
A
PWM-4
PW - OUTPUT