ADwin-Pro
Hardware, manual version 2.9, June 2006
177
Pro I: Signal Conditioning and Interface Modules
Pro-Fieldbus Modules
ADwin
the module is made using the instruction
INIT_SLAVE
, so that the user does
not have to pay attention to how the area functions.
Control register
The control area consists of two registers, which enable the handshake to
access the DP-RAM, and of registers, from which information about the mod-
ule and its configuration can be read out. The content of the individual areas
are shown in the table below. Important: Only experienced users may write val-
ues directly into the control area.
Fig. 308 – Pro-Fieldbus-SL: Control register
Area
Size
(Byte)
Meaning
7C0h-7C1h
2
Version number of the bootloader
7C6h-7C9h
4
Serial number
7CAh-7CBh
2
Manufacturer
7CCh-7CDh
2
Identification of the field bus type:
0001h
: Profibus
0010h
: Interbus
7CEh-7CFh
2
Version number of the software
7D4h-7D5h
2
Watchdog counter (counter increments every ms)
7DAh-7DFh
6
Status of the LED, meaning depends on the field-
bus:
1. Byte: LED bottom left
2. Byte: LED top left
3. Byte: LED top right
4. Byte: LED bottom right
7E0h-7E1h
2
Module type:
0101h
= Slave
7E2h
1
Bit 0: Status of the inputs when the program stops:
Bit = 0: Set inputs to 0.
Bit = 1: Freeze inputs
Bit 1: Status message: Changed output data
Bit = 0: Message is disabled
Bit = 1: Message is enabled (see
7E4H-7E5H
)
7E3h
1
Bit 0 = 0: Bus is offline
Bit 0 = 1: Bus is online
Bit 1 = 0: Clear outputs, when bus is offline
Bit 1 = 1: Freeze outputs when bus is offline
7E4h-7EBh
8
The bits in this area show if the data in the output
area have changed. Each bit stands for 8 data
bytes in the output area.
7EDh
1
Interrupt source
7EEh
1
Released interrupts
7F0h-7F1h
2
Size of the input area for cyclic data transfer (in
bytes)
7F2h-7F3h
2
Size of the total input area in the DP-RAM (in bytes)
7F4h-7F5h
2
Size of the total input area (in bytes)
7F6h-7F7h
2
Size of the output area for cyclic data transfer (in
bytes)
7F8h-7F9h
2
Size of the total output area in the DP-RAM (in
bytes)
7FAh-7FBh
2
Size of the total output area (in bytes)
7FEh-7FFh
2
Handshake register
