268
Contention between TCNT Byte Write and Increment: If an increment pulse occurs in the T
2
or T
3
state of a TCNT byte write cycle, writing takes priority and TCNT is not incremented. The
TCNT byte that was not written retains its previous value. See figure 8-63, which shows an
increment pulse occurring in the T
2
state of a byte write to TCNTH.
ø
Address
Internal write signal
TCNT input clock
TCNTH
TCNTL
TCNTH byte write cycle
T
1
T
2
T
3
N
TCNTH address
M
TCNTH write data
X
X
X + 1
Figure 8-63 Contention between TCNT Byte Write and Increment
