538
18.3.3 Clock Timing
Clock timing is shown below.
•
Oscillator settling timing
Figure 18-13 shows the oscillator settling timing.
ø
V
CC
STBY
RES
t
OSC1
t
OSC1
Figure 18-13 Oscillator Settling Timing
18.3.4 TPC and I/O Port Timing
TPC and I/O port timing is shown below.
T
1
T
2
T
3
ø
Ports 1 to 3,
5 to 9, A, and
B (read)
Ports 1 to 3,
5, 6, 8, 9, A,
and B (write)
t
PRS
t
PRH
t
PWD
Figure 18-14 TPC and I/O Port Input/Output Timing
