414
8331B–AVR–03/12
Atmel AVR XMEGA AU
31.6.1
Bypass Register
The bypass register consists of a single shift register stage. When the bypass register is
selected as the path between TDI and TDO, the register is reset to 0 when leaving the capture
DR controller state. The bypass register can be used to shorten the scan chain on a system
when the other devices are to be tested.
31.6.2
Device Identification Register
31.6.2.1
Version
Version is a 4-bit number identifying the revision of the device. The JTAG version number fol-
lows the revision of the device. Revision A is 0x0, revision B is 0x1, and so on.
31.6.2.2
Part Number
The part number is a 16-bit code identifying the device. Refer to the device data sheets to find
the correct number.
31.6.2.3
Manufacturer ID
The manufacturer ID is an 11-bit code identifying the manufacturer. For Atmel, this code is
0x01F.
31.6.3
Boundary Scan Chain
The boundary scan chain has the capability of driving and observing the logic levels on all I/O
pins. Refer to
”Boundary Scan Chain” on page 412
for a complete description.
31.6.4
PDICOM Data Register
The PDICOM data register is a 9-bit wide register used for serial-to-parallel and parallel-to-serial
conversions of data between the JTAG TAP and the PDI. For details, refer to
Figure 31-5.
Device identification register.
MSB
LSB
Bit
31
28
27
12
11
1
0
Device ID
Version
Part Number
Manufacturer ID
1
4 bits
16 bits
11 bits
1 bit
