194
8331B–AVR–03/12
Atmel AVR XMEGA AU
15.3
Block Diagram
Figure 15-1.
Block diagram of the 16-bit timer/counter 0 with split mode.
15.4
Clock Sources
The timer/counter can be clocked from the peripheral clock (clk
PER
) and from the event system.
shows the clock and event selection.
Base Counter
Compare
(Unit x = {A,B,C,D})
Counter
HPER
= 0
Control Logic
CTRLA
HUNF
(INT/DMA Req.)
BOTTOML
LPER
Compare
(Unit x = {A,B,C,D})
Waveform
Generation
LCMPx
(INT/DMA
Req.)
OCLx Out
=
LCMPx
"match"
BOTTOMH
LCNT
"count low"
"load low"
=
HCMPx
Waveform
Generation
"match"
OCHx Out
= 0
"count high"
"load high"
HCNT
Clock Select
LUNF
(INT/DMA Req.)
