Artesyn MVME5100, Programmer'S Reference Manual, Page: 19 / 318

About this Manual
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B)
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This manual is divided into the following chapters and appendices:

Chapter 1, Product Data and Memory Maps , provides a description of the MVME5100,
tables of specific memory maps and other control registers.

Chapter 2, Hawk PCI Host Bridge & Multi-Processor Interrupt Controller , provides a description
of the Hawk’s PowerPC to Local Bus Bridge (PHB) and the Multi-Processor Interrupt
Controller (MPIC) including a list of features, a block diagram, a functional description and
corresponding register tables.

Chapter 3, System Memory Controller (SMC) , provides an explanation of the
(SMC) portion of the Hawk ASIC including a features list, block diagrams, functional
descriptions, and an explanation and description of all corresponding registers.

Chapter 4, Hawk Programming Details , provides a summary of the Hawk programming
details that are relevant to every day programming functions, including a listing of the
Hawk MPIC External Interrupts, the 8259 Interrupts, and a description of certain
exceptions such as sources of reset, error notification and handling, endian issues, and
processor/Hawk relationships.

Appendix A, MVME5100 VPD Reference Information , provides an explanation of the VPD
reference information including certain "How to" info, as well as specific VPD Data
Definitions.

Appendix B, VMEbus Mapping Example , provides an example of a mapping scenario
between an MVME5100 and an MVME2700 on a VMEbus backplane.

Appendix C, Related Documentation , provides a listing of related Artesyn Embedded
Technologies documents, vendor documentation and industry specifications.
Abbreviations
This document uses the following abbreviations:
Abbreviation Definition
AUI Attachment Unit Interface
BGA Ball Grid Array
CHRP Common Hardware Reference Platform
CWF Critical Word First