Artesyn MVME5100, Programmer'S Reference Manual, Page: 94 / 318

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B )
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The priority scheme can be programmed by writing the “PRI” field in the PCI Arbiter control
register. The default setting for priority scheme is fixed mode. The Fixed mode holds each
requestor at a fixed level in its hierarchy. The levels of priority for each requestor are
programmable by writing the “HEIR” field in the PCI Arbiter control register.
The following table describes all available settings for the “HEIR” field in fixed mode.
When the arbiter is programmed for round robin priority mode, the arbiter maintains fairness
and provides equal opportunity to the requestors by rotating its grants. The contents in “HEIR”
field are “don’t cares” when operated in this mode.
When the arbiter is programmed for mixed mode, the 8 requestors are divided up into 4
groups and each groups is occupied by 2 requestors. PARB6 and PARB5 are defined in group1;
PARB4 and PARB3 are defined in group 2; PARB2 and PARB1 are defined in group 3; PARB0 and
HAWK are defined in group 4. Arbitration is set for round robin mode between the 2 requestors
within each group and set for fixed mode between the 4 groups. The levels of priority for each
group are programmable by writing the “HEIR” field in the PCI Arbiter control register.
Table 2-13 Fixed Mode Priority Level Setting
HEIR
Setting
Priority Levels
Highest Lowest
000 PARB6 PARB5 PARB4 PARB3 PARB2 PARB1 PARB0 HAWK
001 HAWK PARB6 PARB5 PARB4 PARB3 PARB2 PARB1 PARB0
010 PARB0 HAWK PARB6 PARB5 PARB4 PARB3 PARB2 PARB1
011 PARB1 PARB0 HAWK PARB6 PARB5 PARB4 PARB3 PARB2
100 PARB2 PARB1 PARB0 HAWK PARB6 PARB5 PARB4 PARB3
101 PARB3 PARB2 PARB1 PARB0 HAWK PARB6 PARB5 PARB4
110 PARB4 PARB3 PARB2 PARB1 PARB0 HAWK PARB6 PARB5
111 PARB5 PARB4 PARB3 PARB2 PARB1 PARB0 HAWK PARB6
“000” is the default setting in fixed mode.
The HEIR setting only covers a small subset of all possible combinations. It is the responsibility
of the system designer to connect the request/grant pair in a manner most beneficial to their
design goals.