Artesyn MVME5100, Programmer'S Reference Manual, Page: 172 / 318

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B )
172
2.5.3.4 Vendor Identification Register
There are two fields in the Vendor Identification Register which are not defined for the MPIC
implementation but are defined in the MPIC specification. They are the vendor identification
and device ID fields.
STP
STEPPING.The stepping or silicon revision number of Hawk’s MPIC.
2.5.3.5 Processor Init Register
P1
PROCESSOR 1. Writing a 1 to P1 will assert the Soft Reset input of processor 1. Writing a 0 to it
will negate the SRESET signal.
P0
Table 2-75 Vendor Identification Register
Offset $01080
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name VENDOR IDENTIFICATION
STP
Operation R R R R
Reset $00 $00 $00 $00
Table 2-76 Processor Init Register
Offset $01090
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name
PROCESSOR INIT
P1 P0
Operation R R R R
R/W R/W
Reset $00 $00 $00 $00
0 0