Artesyn MVME5100, Programmer'S Reference Manual, Page: 237 / 318

System Memory Controller (SMC)
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B)
237
3.3.3.5 CLK Frequency Register
CLK FREQUENCY
These bits should be programmed with the hexadecimal value of the operating CLOCK
frequency in MHz (i.e. $42 for 66 MHz). When these bits are programmed this way, the chip’s
prescale counter produces a 1 MHz (approximate) output. The output of the chip prescale
counter is used by the refresher/scrubber and the 32-bit counter. After power-up, this register
is initialized to $64 (for 100 MHz). The formula is:
Counter_Output_Frequency = (Clock Frequency)/CLK_FREQUENCY
For example, if the Clock Frequency is 100 MHz and CLK_FREQUENCY is $64, then the counter
output frequency is 100 MHz/100 = 1 MHz.
When the CLK pin is operating slower than 100MHz, software should program
CLK_FREQUENCY to be at least as slow as the CLK pin’s frequency as soon as possible after
power-up reset so that SDRAM refresh does not get behind.
Table 3-17 CLK Frequency Register
Address $FEF80020
Bit
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Name CLK FREQUENCY
drr 0 0 0 0 0 0 0 po
r
Operation READ/WRITE READ ZERO
R/W
READ ZERO
R R R R R R R R/C
Reset 64 P X
0-P
X
X X X X X X X 1 P